Information is coupled to a data bus such as an IC data bus using a push-pull circuit. The push-pull circuit provides for communicating on the data bus at two different data rates. The push-pull circuit includes an active pull-up device that is enabled during a first push-pull mode of operation for providing a high data rate. During a second normal mode of operation, the active pull-up device is disabled providing a low data rate. When the active pull-up device is deactivated, the clock and data buses are driven by the external resistors connected thereto at a data rate lower than the data rate during the first mode. Systems such as consumer electronics systems typically include various devices, such as integrated circuits, that are coupled together using a data bus for communicating information between the devices. An example of this type of system is a television receiver which includes an I 2C serial data bus for communicating tuning data from a control microprocessor to a tuner causing the tuner to tune a particular channel.

The system is operable in a selectable one of at least a low speed mode and. Bus driver in a communication system. Low speed differential bus driver in a. AN00020 TJA1050 high speed CAN transceiver. Driver and receiver. In this mode the bus output signals are switched as fast as possible with a fixed.

An I 2C data bus is a well known serial data bus comprising two bus lines, a clock line designated SCL and a serial data line designated SDA, that carry information between devices connected to the bus. Each device is assigned a unique address permitting communications on the bus to be directed to a particular device. Each device can transmit data, receive data, or both as required by the function of the device.

In addition to transmitting and receiving data, each device can also function as a master or slave when performing data transfers. A master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. Reamix Breaking The Barriers With Reaper Free here.

At that time, any device addressed is considered a slave. The I 2C bus is a multi-master bus, meaning that more than one device is capable of controlling the bus. Michele Zarrillo Discografia. Masters are usually control devices such as microprocessors, microcomputers, or microcontrollers (also referred to herein as 'controllers').

The possibility of connecting more than one microcontroller to the bus means that more than one master can try to initiate a data transfer at the same time on the bus. A procedure known as arbitration favorably resolves such an event. Arbitration relies on the wired-AND connection of all I 2C interfaces to the bus. Should two or more masters try to place information on the bus, the first one to produce a logic one when the other produces a logic zero will lose the arbitration. The clock signals during arbitration are a synchronized combination of the clocks generated by the masters using the wired-AND connection to the SCL line.

The specification for the I 2C bus protocol specifies that the output stages of devices connected to the bus are to have an open-drain or open-collector in order to perform the wired-AND function. Consequently, pull-up of the bus lines is usually accomplished through pull-up resistors connected between the bus lines and a source of supply voltage. Generation of clock signals on the I 2C bus is always the responsibility of the master devices. Each master generates its own clock signal when transferring data on the bus. Data is only valid during the logic high period of the clock. Bus clock signals from a master can only be altered by another master when arbitration occurs or when the clock signals are stretched by a slow-slave device holding down the clock line.